Product Name: Structera™ S 30260 CXL Switch

Manufacturer: Marvell

Product Category: Computing Hardware, Software and Systems

Supporting Documentation (if available)

As AI infrastructure scales to support large language models and data-intensive workloads, data centers are hitting a critical bottleneck: the memory wall. Memory capacity, bandwidth, and utilization—not compute—have become the primary constraints limiting system performance, driving inefficiencies, rising costs, and stalled scalability across modern AI deployments.

The Marvell® Structera™ S 30260 is a next-generation CXL 3.0 switch purpose-built to overcome this limitation. By enabling rack-scale memory pooling and composable infrastructure, the Structera S 30260 allows data centers to dynamically allocate and scale memory across CPUs, GPUs, XPUs, and accelerators—transforming memory from a fixed, siloed resource into a shared, high-performance fabric.

Structera S 30260 Key Specs and Technical Features

• 260-Lane High-Radix Architecture
Enables dense connectivity across heterogeneous compute and memory resources within rack-scale deployments.
• CXL 3.0 Compliance
Supports next-generation memory pooling, sharing, and coherency across devices in a standards-based ecosystem.
• Up to 4 TB/s Aggregate Bandwidth
Delivers the throughput required for data-intensive AI workloads, including LLM training and inference.
• Sub-Microsecond Memory Access Latency
Provides near-local access to pooled memory, minimizing performance penalties compared to directly attached memory.
• Rack-Level Memory Pooling
Enables dynamic allocation of memory resources across multiple hosts and accelerators, eliminating stranded capacity.
• Composability Across Compute Elements
Supports CPUs, GPUs, XPUs, SSDs, and memory expansion devices within a unified CXL fabric.
• Ecosystem Integration
Works seamlessly with Marvell Structera A near-memory accelerators, Structera X memory controllers, and Alaska® P PCIe/CXL retimers.
• Flexible Interconnect Support
Compatible with copper and optical PCIe/CXL cabling solutions for scalable, low-latency connectivity.

Innovative Architecture for AI Infrastructure

The Structera S 30260 introduces a fundamental shift from monolithic server memory architectures to composable, rack-scale memory systems. By enabling shared memory pools accessible across multiple compute nodes, the switch removes the need to overprovision DRAM at the server level.

This is particularly critical for AI workloads, where memory demands are driven by expanding model sizes, longer context windows, and growing key-value cache requirements. Traditional architectures struggle to efficiently support these workloads, resulting in underutilized resources and increased infrastructure cost.

With sub-microsecond access to pooled memory, the Structera S 30260 eliminates inefficient multi-hop data movement and enables accelerators to access shared memory with near-local performance. This improves GPU utilization, increases throughput, and enables larger models to run efficiently without requiring major infrastructure redesign.

Serving Design Engineers and System Architects

The Structera S 30260 is designed to meet the needs of multiple engineering audiences:
• Design Engineers
Gain a standards-based, high-radix switching solution for implementing disaggregated memory architectures without proprietary interconnects.
• System Integrators
Can build composable infrastructure platforms that scale memory and compute independently, simplifying system design and upgrade cycles.
• Cloud and Hyperscale Architects
Enable rack-scale AI infrastructure with dynamic resource allocation, optimized for performance, efficiency, and scalability.

Benefits to End Users and Data Center Operators
• Higher Memory Utilization
Eliminates stranded memory by enabling shared pools across compute resources.
• Improved AI Performance
Increases throughput and enables larger models through efficient memory access and reduced latency.
• Reduced Total Cost of Ownership (TCO)
Minimizes overprovisioning and reduces dependency on expensive high-bandwidth memory (HBM).
• Infrastructure Flexibility and Scalability
Enables independent scaling of memory and compute resources.
• Faster Deployment of AI Workloads
Simplifies infrastructure design and accelerates time-to-market for new AI applications.

Industry Context and Ecosystem Impact

As AI infrastructure scales, memory capacity and efficiency have emerged as primary constraints on system performance. Industry adoption of CXL 3.0 technologies is accelerating as hyperscalers seek new approaches to overcome these limitations.

The Structera S 30260 builds on Marvell’s comprehensive CXL portfolio—spanning memory expansion, acceleration, and pooling—to deliver a complete end-to-end fabric architecture. This positions Marvell at the forefront of enabling composable infrastructure for next-generation AI data centers.
Availability

The Marvell Structera S 30260 CXL switch is expected to begin sampling in Q3 2026. The Structera S 20256 CXL 2.0 switch is currently in production, enabling early deployment of CXL-based architectures.