Product Name: Marvell Structera™ S 60260 PCIe 6.0 Switch

Manufacturer: Marvell

Product Category: Electronic Components

Supporting Documentation (if available)

As AI systems scale to thousands of interconnected accelerators, the limiting factor is no longer compute—it is the ability to move data efficiently between devices. Traditional PCIe switching architectures require multiple layers of devices to achieve scale, increasing latency, power consumption, and system complexity, and ultimately constraining AI performance.

The Marvell® Structera™ S 60260 is the industry’s first 260-lane PCIe 6.0 switch, purpose-built to overcome these limitations. With the highest radix and nearly double the lane density of competing solutions, it enables single-tier, high-density interconnect architectures that reduce latency, simplify system design, and unlock scalable AI infrastructure.
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Structera S 60260 Key Specs and Technical Features

• Industry’s First 260-Lane PCIe 6.0 Switch
Highest-radix PCIe switch available, enabling significantly greater connectivity within a single device.
• PCIe 6.0 Compliance
Supports next-generation PCIe signaling for high-bandwidth, low-latency communication across AI infrastructure.
• 2x Lane Density vs. Competitive Solutions
Reduces the need for multi-switch architectures, simplifying system design and improving efficiency.
• High-Radix, Single-Tier Switching Architecture
Enables dense GPU-to-GPU, GPU-to-CPU, and accelerator connectivity without additional switching layers.
• Low-Latency Data Path Optimization
Minimizes hop count and improves data flow efficiency across scale-up fabrics.
• Power-Efficient Design
Reduces total system power by eliminating redundant switching devices and associated overhead.
• Drop-in Pin Compatibility with CXL Switches
Supports unified hardware platforms for both PCIe and CXL deployments, reducing design complexity and cost.
• Extended Reach Connectivity
Enables PCIe 6.0 connections up to seven meters with active electrical cables (AECs) and beyond with active optical cables (AOCs).
• Seamless Ecosystem Integration
Works in conjunction with Marvell Alaska® P PCIe retimers for scalable, low-power, high-speed connectivity.
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Innovative Architecture for AI Scale-Up Infrastructure

The Structera S 60260 introduces a fundamental advancement in PCIe scale-up architecture by enabling high-density connectivity within a single switching device. Traditional PCIe fabrics rely on cascading multiple lower-radix switches to connect large numbers of accelerators, which increases latency, power consumption, and board complexity.

By contrast, the 260-lane architecture allows system designers to consolidate switching into a single tier, reducing the number of devices required and eliminating unnecessary interconnect hops. This results in a more efficient data path, improved performance consistency, and simplified system design.

This capability is critical for AI workloads, where performance is highly dependent on fast, efficient communication between GPUs and accelerators. The Structera S 60260 enables tighter coupling of compute resources, supporting higher bandwidth utilization and improved workload distribution across large-scale AI systems.
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Serving Design Engineers and System Architects

The Structera S 60260 is designed to address the needs of multiple engineering stakeholders:
• Design Engineers
Benefit from a high-radix, standards-based PCIe switching solution that simplifies board design, reduces routing complexity, and minimizes the need for multi-tier architectures.
• System Integrators
Can build dense, scalable AI systems with fewer components, reducing integration challenges while improving performance and power efficiency.
• Cloud and Hyperscale Architects
Gain the ability to scale accelerator-rich infrastructure more efficiently, enabling higher compute density and optimized interconnect performance for AI workloads.
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Benefits to End Users and Data Center Operators

• Increased System Density
Enables more GPUs and accelerators to be connected within a single system.
• Lower Latency and Improved Performance
Reduces interconnect hops, improving data transfer efficiency across AI workloads.
• Reduced Total Cost of Ownership (TCO)
Minimizes component count, power consumption, and system complexity.
• Improved Power Efficiency
Eliminates redundant switching layers, reducing overall energy consumption.
• Greater Design Flexibility
Supports unified PCIe and CXL hardware platforms through pin compatibility.
• Scalable AI Infrastructure
Enables efficient scale-up architectures for training and inference of large AI models.
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Industry Context and Ecosystem Impact

As AI models continue to grow in size and complexity, the importance of high-performance interconnects has expanded beyond traditional networking to become a foundational element of system architecture. PCIe switching is now critical for enabling efficient communication between compute resources in accelerated data centers.

The Structera S 60260 builds on Marvell’s expanded PCIe portfolio, strengthened through the acquisition of XConn Technologies, and complements the Alaska® P PCIe retimer family. Together, these solutions form a comprehensive, end-to-end PCIe connectivity platform that enables hyperscalers and data center operators to design flexible, high-performance infrastructure tailored to evolving AI demands.

By addressing the limitations of traditional multi-switch architectures and delivering industry-leading lane density, the Structera S 60260 sets a new benchmark for PCIe scale-up performance.
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Availability

Engineering samples of the Marvell Structera S 60260 PCIe 6.0 switch are available now, with customer sampling expected in Q3 2026. Production-ready PCIe 5.0 switch solutions are currently available.