Product Name: OmniConnect Weaver

Manufacturer: Credo

Product Category: Computing Hardware, Software and Systems

Supporting Documentation (if available)

Weaver is a memory fanout gearbox that significantly boosts memory bandwidth and memory density to optimize computing efficiency of AI accelerators or xPUs. It is the industry’s first memory fanout gearbox for scalable, high bandwidth AI inference. Engineered to overcome the memory bottlenecks in AI inference workloads, Weaver delivers unparalleled scalability, bandwidth, and efficiency for next-generation data center and AI applications.

AI inference workloads are increasingly limited by memory quantity and throughput rather than compute power. Traditional memory solutions, such as LPDDR5X/GDDRX, face constraints in bandwidth, density, and power consumption, restricting system performance and scalability. High Bandwidth Memory (HBM) suffers from very high cost, limited availability, and density issues.

Weaver combines ultra-efficient 112G VSR SerDes with a lightweight AXI framer to deliver high-bandwidth, low-latency, and power-optimized off-substrate connectivity between compute engines and memory.
Credo focused on three areas to address the memory wall challenge: breaking the substrate barrier, breaking the beachfront barrier, and lowering cost and power.

OmniConnect was created by extending Credo’s leading 112G XSR (9dB) SerDes to VSR (23dB), providing 250mm reach at 1.15 pJ/bit with up to 2Tb/mm beachfront and a RTT latency at 40ns.

Compared to conventional architectures, this offers the lowest power (60%-75% lower), highest beachfront density (10x higher) and the lowest latency (50%-80% lower).

Credo’s goal was to create the most efficient AXI over SerDes mapping with a lightweight AXI framer, resulting in <40ns RTT, <2.5pJ/bit bookended power.

The lightweight framer / FEC follows PCIe6 FLIT:
• Credit based flow control
• FEC / CRC from PCIe6 FLIT
• 40ns RTT latency
• Full control over LPDDR5X PHYs (page status / refresh / etc.)
• LPDDR5X PHY (9.6 GT/s)

OmniConnect Weaver features provide the following benefits:
• Low-cost, low-power memory fanout: Enables cheaper LPDDR memory to achieve high bandwidth and high density for evolving AI inference workloads.
• 10x boost in beachfront I/O density: Weaver provides 2Tb/s/mm beachfront density compared to 0.18Tb/s/mm for conventional LPDDR5X.
• 20x increase in memory density: Up to 5.8TB of memory density with Weaver compared to max 256GB using LPDDR5X.
• Future-proof compute for memory transition: Allows simple transition from LPDDR5X to LPDDR6 without any change to XPU.

Weaver is comprised of a chiplet-ready design. It supports flexible DRAM packaging and late binding of DRAM for XPU vendors, allowing system integrators to tailor memory configurations for evolving model requirements.
The technology is ready for seamless migration to next-gen memory protocol, ensuring long-term value and compatibility as the ecosystem advances. Weaver also integrates robust telemetry and diagnostics for enhanced reliability and uptime.

Applications of OmniConnect Weaver include AI inference accelerators, data center servers, cloud infrastructure, automotive and robotics.